文献
J-GLOBAL ID:201702284504949610
整理番号:17A0057837
3D回路設計レイアウトを用いた縦型FET素子の挑戦と機会【Powered by NICT】
Challenges and opportunities of vertical FET devices using 3D circuit design layouts
著者 (19件):
Veloso A.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Huynh-Bao T.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Rosseel E.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Paraschiv V.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Devriendt K.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Vecchio E.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Delvaux C.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Chan B. T.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Ercken M.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Tao Z.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Li W.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Altamirano-Sanchez E.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Versluijs J. J.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Brus S.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Matagne P.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Waldron N.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Ryckaert J.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Mocuta D.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
,
Collaert N.
(Imec, Kapeldreef 75, B-3001 Leuven, Belgium)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2016
号:
S3S
ページ:
1-3
発行年:
2016年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)