Rchr
J-GLOBAL ID:200901010095872178   Update date: Mar. 15, 2024

Kasahara Hironori

カサハラ ヒロノリ | Kasahara Hironori
Affiliation and department:
Job title: Professor
Homepage URL  (1): http://www.kasahara.cs.waseda.ac.jp/kasahara.html.ja
Research field  (1): Computer systems
Research keywords  (1): Parallel Processing, Parallelizing Compiler, Multicore Processor, Green Computing, Computer Science
Research theme for competitive and other funds  (122):
  • 2021 - 2022 組み込みマルチコアプロセッサ向け自動並列化技術の開発
  • 2021 - 2021 コンパイラ「OSCAR」を用いた自動並列化技術と省電力化技術の適用による第一原理計算シミュレーションの評価
  • 2020 - 2021 組み込みマルチコアプロセッサ向け自動並列化技術の開発
  • 2020 - 2021 深層学習における推論処理の高速化・低消費電力化に関する研究
  • 2020 - 2021 高効率・高速処理を可能とするAIチップ・次世代コンピューティングの技術開発/革新的AIエッジコンピューティング技術の開発/動的多分岐・結合トレース型AIプロセッサのエコシステム開発 配分額3,897,000円
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Papers (1,135):
  • Tohma Kawasumi, Hiroki Mikami, Tomoya Yoshikawa, Takero Hosomi, Shingo Oidate, Keiji Kimura, Hironori Kasahara. Parallelizing Ladder Applications with Task Fusion Techniques for Reducing Parallelization Overhead by OSCAR Automatic Parallelizing Compiler. Trans. of IPSJ. 2024. 65. 2. 539-551
  • Fumiaki Onishi, Ryosei Otaka, Kazuki Fujita, Tomoki Suetsugu, Tohma Kawasumi, Toshiaki Kitamura, Hironori Kasahara, Keiji Kimura. Automatic Deep Learning Parallelization for Vector Multicore Chips with the OSCAR Parallelizing and the TVM Open-Source Deep Learning Compiler. Proc. of The 36th International Workshop on Languages and Compilers for Parallel Computing (LCPC 2023), Lexington, Kentucky, USA. 2023
  • Fumiaki Onishi, Ryosei Otaka, Kazuki Fujita, Tomoki Suetsugu, Tohma Kawasumi, Toshiaki Kitamura, Hironori Kasahara, Keiji Kimura. Investigation of code generation techniques for vector multicore targeting using the deep learning compiler TVM. IPSJ SIG Technical Report. 2023. 2023-ARC-254. 8. 1-8
  • Ryosei OTAKA, Honoka KOIKE, Ryusei ISONO, Toma KAWASUMI, Toshiaki KITAMURA, Hiroki MIKAMI, Akira NODOMI, Sadahiro KIMURA, Keiji KIMURA, Hironori KASAHARA. Evaluation of Convolution Layers on an Embedded Vector Multticore having Local Memory Architecture. IPSJ SIG Technical Report. 2023. 2023-EMB-62. 32
  • Raito HAYASHI, Hiroki MIKAMI, Akira NODOMI, Sadahiro KIMURA, Keiji KIMURA, Hironori KASAHARA. Preliminary Evaluation of Low Power Optimized ORB-SLAM3 on Jetson Xavier NX. IEICE Technical Report. 2023. CPSY2022-40
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MISC (18):
  • 藤野 里奈, 韓 吉新, 島岡 護, 見神 広紀, 宮島 崇浩, 高村 守幸, 木村 啓二, 笠原 博徳. 自動並列化コンパイラのコンパイル時間短縮のための実行プロファイル・フィードバックを用いたコード生成手法 (コンピュータシステム) -- (組込み技術とネットワークに関するワークショップETNET2017). 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報. 2017. 116. 510. 207-212
  • 宮田 仁, 島岡 護, 見神 広紀, 西 博史, 鈴木 均, 木村 啓二, 笠原 博徳. 自動車リアルタイム制御計算の複数クラスタ構成マルチコア上での並列化 (コンピュータシステム) -- (組込み技術とネットワークに関するワークショップETNET2017). 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報. 2017. 116. 510. 177-182
  • Bui Duc Binh, Tomohiro Hirano, Hiroki Mikami, Hideo Yamamoto, Keiji Kimura, Hironori Kasahara. Android Video Processing System Combined with Automatically Parallelized and Power Optimized Code by OSCAR Compiler. 2016. 57. 4
  • Android Movie Player System Combined with Automatically Parallelized and Power Optimized Code by OSCAR Compiler. 2014. 2014. 55-62
  • 山下浩一郎, 鈴木貴久, 栗原康志, 大友俊也, 木村啓二, 笠原博徳. 大規模無線センサネットワークにおける外乱を考慮したアーキテクチャ探索シミュレータの実装と評価. マルチメディア、分散協調とモバイルシンポジウム2014論文集. 2014. 2014. 1368-1377
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Patents (94):
  • PARALLEL PROGRAM GENERATING METHOD AND PARALLELIZATION COMPILING APPARATUS
  • PARALLEL PROGRAM GENERATING METHOD AND PARALLELIZATION COMPILING APPARATUS
  • PARALLEL PROGRAM GENERATING METHOD AND PARALLELIZATION COMPILING APPARATUS
  • PARALLELISM EXTRACTION METHOD AND METHOD FOR MAKING PROGRAM
  • PARALLELISM EXTRACTION METHOD AND METHOD FOR MAKING PROGRAM
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Books (19):
  • Technology Predictions
    2022
  • Parallel Processing Technology
    History of Information Process Society of Japan 50years, pp.195-198 2021
  • Embedded Multi-core Handbook (Basic)
    JEITA 2021
  • Special Issue on Parallel Processing
    IPSJ Journal Vol.42, No.4 pp.651-920 2021
  • Embedded Multi-core Handbook (Technology and Application)
    JEITA 2021
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Lectures and oral presentations  (366):
  • 早稲田大学量子技術社会実装拠点設立シンポジウム, 早稲田大学リサーチイノベーションセンター
    (Quantum Technology Research and Implementation Center Inauguration Symposium, Waseda University Research Innovation Center 2024)
  • Roles and Future of Engineers: Implementation of Innovation Ecosystem
    (The Japan Federation of Engineering Societies (JFES) Symposium to celebrate the fifth World Engineering Day, Panel Discussion on Roles and Future of Engineers 2024)
  • Evolution of Compiler and Multiprocessors with Accelerators
    (Panel: Evolution of Parallel Architecture Targets, The 36th International Workshop on Languages and Compilers for Parallel Computing (LCPC 2023), Lexington, Kentucky, USA 2023)
  • OSCAR Codesigned Compiler and Multicore Architecture
    (Keynote Speech, The 36th International Workshop on Languages and Compilers for Parallel Computing (LCPC 2023), Lexington, Kentucky, USA 2023)
  • Panel Discussion: "What is interdisciplinary fusion centered on computer science? -Can we overcome the barriers of the fields?-"
    (Muroran Institute of Technology Computer Science Center Opening Symposium, Muroran Institute of Technology, Hokkaido, Japan 2023)
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Education (3):
  • 1982 - 1985 Waseda University Graduate School of Science and Engineering Department of Electrical Engineering
  • 1980 - 1982 Waseda University Graduate School of Science and Engineering Master Course Department of Electrical Engineering
  • 1976 - 1980 Waseda University School of Science and Engineering Department of Electrical Engineering
Professional career (2):
  • 工学博士 (早稲田大学 電気工学(計算機システム))
  • Doctor Engineering
Work history (45):
  • 2023/01 - 現在 IEEE Life Fellow
  • 2021/06 - 現在 IEEE E. Allen Medal Committee
  • 2017/05 - 現在 Engineering Academy of Japan Member
  • 2017/01 - 現在 IEEE Fellow
  • 2010/01 - 現在 IEEE Computer Society Golden Core Member
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Committee career (314):
  • 2024/02 - 現在 Japan Science and Technology Agency Chair, Committee for Doctoral Students Support
  • 2023/06 - 現在 ACM / IEEE ACM/IEEE Co-General Chair, ISCA2025 (International Symposium on Computer Architecture)
  • 2023/04 - 現在 Japan Science and Technology Agency External Committee Member, Japan Science and Technology Agency (JST) Self-Assessment Committee Subcommittee
  • 2023/03 - 現在 Japan Science and Technology Agency Governing Board Member, Japan Science and Technology Agency (JST) Research Accomplishments Development Project University-Launched New Industry Creation Program, Governing Board
  • 2023/03 - 現在 World Economic Forum Impact Circle: Innovation for the Public Sector Member
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Awards (13):
  • 2023/01 - IEEE Life Fellow
  • 2021/01/01 - SCAT (Support Center for Advanced Telecommunications Technology Research) SCAT (Support Center for Advanced Telecommunications Technology Research) President Grand Award
  • 2020/06/03 - Information Processing Society of Japan Information Processing Society of Japan, Contribution Award
  • 2019/10/26 - IEEE Computer Society Spirit of the IEEE Computer Society Award Distinguished Contribution for Progress of Resarch, Education and Standard in Computer Technology in the World
  • 2017/01/01 - IEEE Fellow
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Association Membership(s) (20):
IEEE Life Fellow ,  The Engineering Academy of Japan, Director ,  COCN Board Member ,  IEEE Eta Kappa Nu Professional member, ,  The Engineering Academy of Japan Inc.(EAJ) ,  Science Council of Japan Member ,  IEEE Fellow ,  The Okawa Foundation for Information and Telecommunications ,  IEEE Senior Member, ,  IPSJ Fellow ,  ACM ,  IEEE Professional member ,  The Robotics Society of Japan ,  IEEE Computer Society ,  Japan Society for Simulation Technology ,  The Institute of Electronics, Information and Communication Engineers ,  IEEE ,  Information Processing Society of Japan ,  IEEE Computer Society President ,  Institute of Electrical Engineers of Japan
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