SATO,Tomoaki Tomoaki

サトウトモアキ | SATO,Tomoaki Tomoaki

Affiliation and department：
Job title： Professor
Homepage URL (1)： http://www.ipc.hokusei.ac.jp/~z00738/

Research field (3)： Information security , Information networks , Computer systems

Research keywords (1)：情報セキュリティ,組み込み機器,計算機アーキテクチャ

Research theme for competitive and other funds (10)：

2022 - 2026 Development of a High-Speed and Low-Power IPS Processor Capable of Dynamic and Automatic Generation of Decision Tree Circuits
2019 - 2024 Development of a Machine learning IPS processor with ASIC-FPGA Co-design and Wave-Pipelining
2016 - 2020 Development of IPS Processors for High-Speed, Low-Power Design with Self-Restoration Function and Protection of Targeted Attacks
2013 - 2017 Development of Host-Based IPS Processor Using Delay Adjustment Method by Routing and Optimization of Detection Circuits
2011 - 2014 Development of the Reconfigurable Host-Based IPS Processor with the Multiplexed Data Bus

Show all

Papers (122)：

Tomoaki Sato. Technical development of Intrusion Prevention Systems with Reconfigurable Devices. IEICE Technical Report SIS2023-19. 2023. 123. SIS-208. 19-24
T. Sato, K. Higuchi, S. Chivapreecha, P. Moungnoul. Proposal of a High-speed and Low-power Architecture for Entropy Coding Processing to Achieve Highest Compression Rate. Proc. of the 1st ECTI UEC Workshop on AI and Applications. 2019. 72-73
T. Sato, S. Chivapreecha, K. Higuchi and P. Moungnoul. Designing a Fine-Tuning Tool for Machine Learning with High-Speed and Low-Power Processing. Proc. of ISCIT 2018. 2018. 204-207
U. Chaiwongkhan, S. Matathong, T. Sato and P. Moungnoul. Comparison of Frequency ReuseSchemes for LTE Micro-Macro Cells. Proc. of ECTI-CON 2018. 2018. 214-217
T. Sato, S. Chivapreecha, K. Higuchi and P. Moungnoul. Automatc Fine-Tuning of Wave-Pipelined Circuits and Development of Route Analysis Tool for It. Proc. of ITC-CSCC 2018. 2018. 118-121

ｍore...

MISC (11)：

Maho Toyoshima and Tomoaki Sato. Development of a CAD Tool for FPGA Circuits That Can Be Designed with RTL. 2023. 1. 3-4
SATO Tomoaki, IMADA Tomoya, MOUNGNOUL Phichet, FUKASE Masa-aki. FPGA Implementation of the Improved WEP Algorithm. 2012. 112. 78. 1-5
A Challenge to Develop a Ubiquitous Processor Chip. 2012. 2012. 9. 1-6
A Challenge to Develop a Ubiquitous Processor Chip. 2012. 2012. 9. 1-6
Saito Keisuke, Imaruoka Shuya, Sato Tomoaki, Fukase Masa-aki. L-004 Evaluation of Packet Filtering Unit. 2009. 8. 4. 129-130

ｍore...

Books (2)：

Lectures and oral presentations (7)：

Electronics & Control session chair
(iEECON2020 2020)
Proposal of a High-speed and Low-power Architecture for Entropy Coding Processing to Achieve Highest Compression Rate
(The 1st ECTI UEC Workshop on AI and Applications 2019)
Emerging Technologies in Multimedia and Communication Systems, Session Chair
(INTERNATIONAL SYMPOSIUM ON MULTIMEDIA AND COMMUNICATION TECHNOLOGY 2019 2019)
Computer (II), Session Chair
(ECTI-CON 2019 2019)
Special Session 4: “Social Sciences and IT 2” session chair & organizer
(ISCIT 2018 2018)

ｍore...

Works (50)：

ｍore...

Education (3)：

1998 - 2001 Tohoku University Graduate School of Engineering Dept. of Machine Intelligence and Systems Engineering
1996 - 1998 Hirosaki University Graduate School of Science Dept. of Information Science
1992 - 1996 Hirosaki University Faculty of Science Dept. of Information Science

Professional career (3)：

Work history (4)：

2017/04 - 現在 Hokusei Gakuen University School of Economics Department of Management Information Professor
2005/04 - 2017/03 Hirosaki University Associate Professor
2012/04 - 2015/03 The Open University of Japan Associate Professor
2001/04 - 2005/03 Sapporo Gakuin University Lecturer

※ Researcher’s information displayed in J-GLOBAL is based on the information registered in researchmap. For details, see here.

Return to Previous Page