Kimura Shinji

• 2023 - 2026 再構成アクセラレータのための近似最適化手法
• 2022 - 2025 攻撃に耐性を持つ機械学習モデルによる設計工程ハードウェアトロイ検知
• 2021 - 2023 サテライトコンピューティングシステムの信頼性と高性能化
• 2019 - 2022 Hardware-Trojan Detection for Integrated Circuit Design Data based on Machine Learning
• 2018 - 2021 再構成アクセラレータにおけるデータ形式最適化と精度保証
2013 - 2015 大域的超低エネルギー化を実現するLSI抽象モデルと上位下位統合化LSI設計技術
2010 - 2012 Abstract LSI Model and Its Associated High-Level Synthesis Algorithm for Deep Submicron Technologies
2008 - 2010 Research on design and implementation of Ultra Large scale LSI
2005 - 2007 High-level Hardware Verification Based on Equivalence Logic with Similarities
2002 - 2004 Hardware Verification with respect to Program Specification
2002 - 高性能プロセッサの設計技術に関する研究
2002 - フレキシブルIPの形式的検証技術の研究
1999 - 2001 Implementation of Adaptable Hardware and Software for Changing Environment
2001 - IPベースシステムLSI設計技術の研究
1995 - 1997 Research on Reconfigurable General Purpose Co-processor Systems and Their Optimized Hardware/Software Codesign Compiler
1992 - 1992 二分決定グラフを用いた論理回路の自動合成に関する研究
1990 - 1992 Studies on Digital-Controller Configuration Design and Its Synchronization Control Using Multiple Digital Signal Processors.
1991 - 1991 二分決定グラフの並列構成アルゴリズムおよびその設計検証への応用に関する研究
1988 - 1989 OPERATION ON SETS AND IT'S APPLICATIONS TO COMPUTER AIDED DESIGN OF ROBUST CONTROL SYSTEMS
1984 - 1986 Studies on Computer-Aided Design of Microprocessor Controlled Precise AC Servo Systems.
コンテンフに適応する発展的ソフトウェアの構成法
順序機械の設計検証のための暗黙状態数え上げの並列化に関する研究
超並列アルゴリズム設計のためのデータ構造と計算モデルに関する研究
パイプライン処理の形式的並列設計検証手法に関する研究
論理回路の縮約モデルの自動抽出とそれを用いた大規模論理回路の設計検証に関する研究
論理回路の合成手法および最適化手法の高速化に関する研究
コンテンツに適応する発展的ソフトウェアの構成法

• Jie Li, Yi Guo, Shinji Kimura. Accuracy-Configurable Low-Power Approximate Floating-Point Multiplier Based on Mantissa Bit Segmentation. 2020 IEEE Region 10 Conference(TENCON). 2020. 1311-1316
• Yi Guo, Heming Sun, Ping Lei, Shinji Kimura. Approximate FPGA-Based Multipliers Using Carry-Inexact Elementary Modules. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 2020. 103-A. 9. 1054-1062
• Yi Guo, Heming Sun, Shinji Kimura. Small-Area and Low-Power FPGA-Based Multipliers using Approximate Elementary Modules. Proc. of ASP-DAC 2020. 2020. 599-604
• Yi Guo, Heming Sun, Shinji Kimura. Energy-Efficient and High-Speed Approximate Signed Multipliers with Sign-Focused Compressors. Proc. of 2019 32nd IEEE International System-on-Chip Conference (SOCC). 2019. 330-335
• Yufeng Xu, Yi Guo, Shinji Kimura. Approximate Multiplier Using Reordered 4-2 Compressor with OR-based Error Compensation. Proc. of 2019 IEEE 13th International Conference on ASIC (ASICON). 2019. 1-4

ｍore...

• Data Structure for Quantum Annealing Emulator. 2019. 2019. 39-44
• Implementation and Optimization of Parallel Prefix Adders Using Majority Function. 2017. 117. 274. 109-114
• Implementation and Optimization of Parallel Prefix Adders Using Majority Function. 2017. 117. 273. 109-114
• GUO Yi, SUN Heming, JIN Canran, KIMURA Shinji. High Accuracy 8×8 Approximate Multiplier based on OR Operation (VLSI設計技術). 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報. 2017. 116. 478. 19-24
• HAN Xushen, ZHOU Dajiang, KIMURA Shinji. MERP-CNN : A memory-efficient reconfigurable processor for convolutional neural networks based on FPGA (VLSI設計技術). 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報. 2016. 116. 21. 47-52

ｍore...

• システムLSI設計工学
  オーム社 2006 ISBN:4274202976

• - 1985 Kyoto University Graduate School of Engineering Doctor Course on Information Engineering
• - 1984 Kyoto University Graduate School of Engineering Master Course on Information Engineering
• - 1982 Kyoto University Faculty of Engineering

• Doctor of Engineering (Kyoto University)

• 2002 - 現在 Professor at Waseda University
• 1993 - 2002 Associate Professor at Nara Institute of Science and Technology
• 1985 - 1993 Assistant Professor at Dept. of Electric Engineering, Kobe University

• 2012/09 - 編集活動感謝状
• 2000 - 日経 BP 社, LSI IP デザインアワード, IP 賞
• 2000 - Asian South-Pacific Design Automation Conference, University LSI Design Contest
• 1999 - 日経 BP 社, LSI IP デザインアワード, IP 賞
• 1993/03 - 情報処理学会 全国大会 第45回 奨励賞

Associations for Computing Machinery ,  IPSJ ,  IEICE ,  IEEE ,  The 14th Workshop on Synthesis And System Integration of Mixed Information technologies ,  The 15th Workshop on Synthesis And System Integration of Mixed Information technologies ,  VLSI Design Technologies WG, IEICE ,  Information Processing Society in Japan ,  International Conference on Computer Aided Design ,  Asia and South Pacific Design Automation Conference