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J-GLOBAL ID:200901026698726838   Update date: Feb. 14, 2024

Wakatani Akiyoshi

ワカタニ アキヨシ | Wakatani Akiyoshi
Affiliation and department:
Job title: Professor
Research field  (2): Information networks ,  Computer systems
Research keywords  (3): -Parallel Processing ,  並列処理 ,  Parallel Processing
Research theme for competitive and other funds  (5):
  • 2019 - 2022 記述のゆれを許容した教育用疑似自然言語プログラミング環境の構築
  • 2018 - 2021 並列プログラミングのための反転授業向け学習支援ツールの研究
  • 2015 - 2018 反転授業のためのプログラミング言語学習用例題自動生成システムの研究
  • 2000 - 2018 並列画像処理アルゴリズムの研究
  • 2000 - 2007 Study on Parallel Image Processing
Papers (70):
  • Jesus Camara, Jose-Carlos Cano, Javier Cuenca, Toshiyuki Maeda, Mariano Saura-Sanchez, Lewis Tseng, Akiyoshi Wakatani, Martina Barnas. EduPar Virtual Poster Session. 2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). 2021. 336-341
  • 若谷彰良, 前田利之. 並列プログラミング教育のための 自学用Web アプリケーションスイートの試作. 甲南大学紀要 知能情報学編. 2021. 13. 2. 87-102
  • 若谷彰良. Incremental auto-tuning を用いたOpenCLのhybrid 並列化. 甲南大学紀要 知能情報学編. 2021. 13. 2. 103-110
  • T. Maeda, M. Yajima, A.Wakatani. Pseudo Natural Language Programming Environment for College Education. 18th Annual Hawaii International Conference on Education. 2020
  • 若谷彰良, 浅見啓汰, 濱口昌寿. スマートスピーカ-を利用した脳トレーニングアプリの試作. 甲南大学紀要 知能情報学編. 2020. 12. 2. 159-166
more...
MISC (53):
  • 若谷彰良. メニーコア時代の並列プログラミング. 甲南大学紀要 知能情報学編. 2013. 6. 2. 175-184
  • Murakami Akio, Wakatani Akiyoshi. B-006 GPGPU implementation of VQ codebook generation using Aggressive PNN method. 2012. 11. 1. 177-178
  • KADOTA Hiroshi, WAKATANI Akiyoshi. A Design of an Adaptive Network on Chip for the Many-core System. IEICE technical report. 2010. 109. 462. 181-186
  • KADOTA Hiroshi, WAKATANI Akiyoshi. A Study of Topology-adaptive Network-on-Chip for Many-Core SoC. IEICE technical report. 2009. 109. 198. 85-90
  • KADOTA Hiroshi, WAKATANI Akiyoshi. A Proposal of an Adaptive Network on Chip for Multi-Core SoC. IEICE technical report. 2009. 108. 478. 117-122
more...
Books (5):
  • Multi-step parallel PNN algorithm for distributed-memory systems
    Computer and Information Science,Studies in Computational Intelligence, pp. 41-51, May. 2008 2008 ISBN:3540791868
  • Parallelization of VQ Codebook Generation using Lazy PNN Algorithm
    Parallel Computing: Software Technology, Algorithms, Architectures & Applications,Editors; G. Joubert et al., Elsevier Science, pp.415-422 2004 ISBN:0444516891
  • Parallel Programming Language ADETRAN in "Parallel Language and Compiler Research in Japan"
    Kluwer Academic 1995
  • Parallel Language and Compiler Research in Japan(共著)
    Kluwer Academic publishers 1995
  • 超並列コンピュータ ADENARTの構成とソフトウエア
    工業調査会 1992
Works (1):
  • メディア処理用リコンフィギュラブルアーキテクスチャの粒度最適化 電子情報通信学会 リコンフィアギュラブルシステム研究会
Education (2):
  • - 1986 Kyoto University Graduate School, Division of Engineering
  • - 1984 Kyoto University Faculty of Engineering
Professional career (1):
  • 博士(工学) (京都大学)
Work history (12):
  • 2008/04/01 - 現在 KONAN UNIVERSITY Faculty of Intelligence and Informatics Professor
  • 2020/04/01 - 2021/03/31 KONAN UNIVERSITY Graduate School of Natural Science (Masters Degree Program) Graduate School of Natural Science Deprtment of Intelligent Systems and Informatics (Masters Degree Program)
  • 2016/04/01 - 2018/03/31 KONAN UNIVERSITY Faculty of Intelligence and Informatics Faculty of Intelligence and Informatics Department of Intelligence and Informatics
  • 2011/04/01 - 2012/03/31 KONAN UNIVERSITY Graduate School of Natural Science (Masters Degree Program) Graduate School of Natural Science Deprtment of Information Science and Systems Engineering (Masters Degree Program)
  • 2010/04/01 - 2011/03/31 KONAN UNIVERSITY Faculty of Science and Engineering Faculty of Science and Engineering Department of Information Science and Systems Engineering
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Association Membership(s) (4):
情報処理学会 ,  IEEE Computer Society ,  IEEE Computer Society (国外) ,  情報処理学会(国内)
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