Rchr
J-GLOBAL ID：200901085174935541
Update date: Jul. 28, 2010
Saito Hiroshi
サイトウ ヒロシ | Saito Hiroshi
Affiliation and department：
Job title：
Assistant Professor
Homepage URL (1)：
http://cldr02.u-aizu.ac.jp
Research field (2)：
Information networks
, Computer systems
Research keywords (3)：
設計自動化
, 非同期式回路
, Asynchronous circuits
Research theme for competitive and other funds (4)：
- ネットワークオンチップの高位合成に関する研究
- 非同期式回路の設計自動化に関する研究
- High-level synthesis of Network on Chip architecture
- Synthesis of Asynchronous Circuits
MISC (16)：
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H. Saito, H. Nakamura, M. Fujita, and T. Nanya : Logic Optimization of Asynchronous Speed-Independent Circuits Using Transduction Methods. IPSJ Journal. 2004. 4. 5. 1289-1299
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E. Kim, H. Saito, J-G. Lee, D-I. Lee, H. Nakamura, and T. Nanya. : "Performance optimization of Synchronous Control Units for Datapaths with Variable Delay Arithmetic Units". In Proc. Asia South Pacific Design Automation Conference, Kitakyusyu, Japan. 2003. pp.816-819
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H. Saito, H. Nakamura, M. Fujita, and T. Nanya. : "Logic Optimization of Asynchronous SI Controllers using Transduction Method". In. Proc. Asia South Pacific Design Automation Conference, Kitakyusyu, Japan. 2003. pp.197-202
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E. Kim, H. Saito, J-G. Lee, D-I. Lee, H. Nakamura, and T. Nanya. : "Distributed Synchronous Control Units for Data flow Graphs under Allocation of Telescopic Arithmetic Units". In Proc. Design Automation and Test in Europe, Munich, Germany. 2003. pp.276-281
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H. Saito, E. Kim, N. Sretaseereekul, M. Imai, H. Nakamura, and T. Nanya. : "Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions". In Proc. IEEE International Symposium on Asynchronous Circuits and Systems, Vancouver, Canada. 2003. pp.184-193
ｍore...
Education (6)：
Professional career (1)：
Association Membership(s) (3)：
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