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ArticleJ-GLOBAL ID:200902000096076306整理番号:89A0082844

特集「命令セットアーキテクチャ」 3 ハードウェアから見た命令セットアーキテクチャ 3.4 高水準言語計算機の命令セットアーキテクチャ

Instructions set processor architecture of high-level language machines.

著者:中田登志之(日本電気 C&Cシステム研)、新淳(日本電気 C&Cシステム研)、中島震(日本電気 C&Cシステム研)
資料名:情報処理 巻:29 号:12 ページ:1428-1437
発行年:1988年12月
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J-GLOBAL: Linking, Expanding and Sparking

About J-GLOBAL

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