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ArticleJ-GLOBAL ID:200902001891595210整理番号:90A0437840

A new concept for chip architecture design-interactive architecture compilation form system specification to register-transfer algorithms.

チップアーキテクチャ設計の新しい概念 システム記述からレジスタ・トランスファアルゴリズムを生成する対話型アーキテクチャ・コンパイラ

著者:WIENKOP U(Siemens AG, Muenchen, DEU)
資料名:Microprocessing Microprogramming 巻:28 号:1/5 ページ:319-322
発行年:1990年03月
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