Art
J-GLOBAL ID:200902001891595210   Reference number:90A0437840

A new concept for chip architecture design-interactive architecture compilation form system specification to register-transfer algorithms.

チップアーキテクチャ設計の新しい概念 システム記述からレジスタ・トランスファアルゴリズムを生成する対話型アーキテクチャ・コンパイラ
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Material:
Volume: 28  Issue: 1/5  Page: 319-322  Publication year: Mar. 1990 
JST Material Number: A0883A  ISSN: 0165-6074  CODEN: MMICDT  Document type: Article
Article type: 原著論文  Country of issue: Netherlands (NLD)  Language: ENGLISH (EN)
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CAD,CAM 

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