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ArticleJ-GLOBAL ID:200902002090823048整理番号:90A0018531

ランプアニールによるエミッタ・ベース自己整合型トランジスタのベース引出しPoly Si電極の低抵抗化

Resistivity reduction of base polycrystalline silicon electrode in emitter-base self-aligned bipolar transistor by means of lamp annealing.

著者:宇田日出(日立)、大園世子(日立)、大和田伸郎(日立)
資料名:電子情報通信学会技術研究報告 巻:89 号:263(SDM89 111-119) ページ:49-54
発行年:1989年10月27日
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