Art
J-GLOBAL ID：200902015509288240   Reference number：88A0406705

VHDL simulator provides interactive verification.

対話型検証を行うVHDLシミュレータ
Author (1)：
GOERING R

About GOERING R


Material：
Computer Design  (Magazine of Computer Based Systems)

About Computer Design


Volume： 27  Issue： 10  Page： 24  Publication year： May. 15, 1988 
JST Material Number： A0090A  ISSN： 0010-4566  CODEN： CMPDA  Document type： Article
Article type： 解説  Country of issue： United States (USA)  Language： ENGLISH (EN)
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system description language

About system description language

,...
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JST classification (1)：
JST classification
Category name(code) classified by JST.
Computer system development 
(JD02010R)

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Terms in the title (4)：
Terms in the title
Keywords automatically extracted from the title.
対話型

About 対話型

, 
検証

About 検証

, 
VHDL

About VHDL

, 
シミュレータ

About シミュレータ


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