Art
J-GLOBAL ID：200902015531036769
Reference number：81A0300728
An improved design for a stochastically conflict-free memory/interconnection system.
確率的無競合メモリ相互結合システム設計の改善
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Author (1)：
Material：
Volume：
14th
Page：
443-448
Publication year：
1981
JST Material Number：
D0709A
Document type：
Proceedings
Article type：
原著論文
Country of issue：
United States (USA)
Language：
ENGLISH (EN)
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JST classification (1)：
JST classification
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Digital computer systems in general
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