Art
J-GLOBAL ID：200902015601588365
Reference number：87A0455004
Designing VLSI network nodes to reduce memory traffic in a shared memory parallel computer.
メモリ共用並列コンピュータにおけるメモリトラヒックを削減するVLSIネットワークノードの設計
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Author (4)：
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Material：
Volume：
6
Issue：
2
Page：
217-238
Publication year：
1987
JST Material Number：
H0430B
ISSN：
0278-081X
Document type：
Article
Article type：
原著論文
Country of issue：
United States (USA)
Language：
ENGLISH (EN)
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JST classification (1)：
JST classification
Category name(code) classified by JST.
Digital computer hardwares in general
Terms in the title (6)：
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