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ArticleJ-GLOBAL ID:200902015729979758整理番号:88A0147151

Synthesis of self-timed VLSI circuits from graph-theoretic specifications.

グラフ理論的仕様による自己タイミングVLSI回路の合成

著者:CHU T‐A(M.I.T., MA, USA)
資料名:Proc IEEE Int Conf Comput Des VLSI Comput Process 巻:1987 ページ:220-223
発行年:1987年
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