Art
J-GLOBAL ID：200902019041270858   Reference number：82A0463990

A critique of network speed in VLSI models of computation.

計算のVLSIモデルにおける回路網の速度の評価法
Author (3)：
BILARDI G

About BILARDI G

(Univ. Illinois at Urbana-Champaign)

About Univ. Illinois at Urbana-Champaign

, 
PRACCHI M

About PRACCHI M

(Univ. Illinois at Urbana-Champaign)

About Univ. Illinois at Urbana-Champaign

, 
PREPARATA F P

About PREPARATA F P

(Univ. Illinois at Urbana-Champaign)

About Univ. Illinois at Urbana-Champaign


Material：
IEEE Journal of Solid-State Circuits  (IEEE J Solid-State Circuits)

About IEEE Journal of Solid-State Circuits


Volume： 17  Issue： 4  Page： 696-702  Publication year： Aug. 1982 
JST Material Number： B0761A  ISSN： 0018-9200  CODEN： IJSCBC  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
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VLSI

About VLSI

,...
Semi thesaurus term：
Thesaurus term/Semi thesaurus term
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All keywords is available on JDreamIII(charged).
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random access memory

About random access memory


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JST classification (1)：
JST classification
Category name(code) classified by JST.
General 
(NC03161C)

About General

Terms in the title (5)：
Terms in the title
Keywords automatically extracted from the title.
計算

About 計算

, 
VLSI

About VLSI

, 
モデル

About モデル

, 
回路網

About 回路網

, 
評価法

About 評価法


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