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ArticleJ-GLOBAL ID:200902051267798198整理番号:87A0019107

An algorithm to eliminate all complex triangles in a maximal planar graph for use in VLSI floor-plan.

VLSIの配置設計に使用するための最大平面グラフから複雑な三角形を全部取除くアルゴリズム

著者:TSUKIYAMA S(Osaka Univ., Suita, JPN)、KOIKE K(Osaka Univ., Suita, JPN)、SHIRAKAWA I(Osaka Univ., Suita, JPN)
資料名:IEEE Int Symp Circuits Syst 巻:1986 号:Vol.1 ページ:321-324
発行年:1986年
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