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ArticleJ-GLOBAL ID:200902051361759708整理番号:87A0304997

A strategy for enhancing fault coverage on VLSI circuit boards using performance in-circuit test techniques.

回路内試験技術の動作を使用したVLSI回路板における欠陥検出範囲を強化する戦略

著者:FABISH M(Teradyne Inc., NC, USA)
資料名:Proc Int Test Conf 巻:1986 ページ:312-316
発行年:1986年
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About J-GLOBAL

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