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ArticleJ-GLOBAL ID:200902165197868555整理番号:02A0618553

Analysis and Minimization of Phase Noise of the Digital Hybrid PLL Frequency Synthesizer.

ディジタルハイブリッドPLL周波数シンセサイザの位相雑音の解析と最小化

著者:RYU H‐G(Chungbuk National Univ., Chungbuk, KOR)、LEE H‐S(Chungbuk National Univ., Chungbuk, KOR)
資料名:IEEE Trans Consum Electron 巻:48 号:2 ページ:304-312
発行年:2002年05月
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