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ArticleJ-GLOBAL ID:200902165213139631整理番号:01A0039802

Design of a Sense Circuit for Low-Voltage Flash Memories.

低電圧フラッシュメモリ用センス回路の設計

著者:TANZAWA T(Development Center, Yokohama, JPN)、TAKANO Y(Development Center, Yokohama, JPN)、TAURA T(Development Center, Yokohama, JPN)・・・
資料名:IEEE J Solid-State Circuits 巻:35 号:10 ページ:1415-1421
発行年:2000年10月
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About J-GLOBAL

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J-GLOBAL links information that represents the key to research and development. For example, linking articles and patents with people (authors and inventors) enables the extraction of a sequence of information.
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The system enables searches of similar kinds of content through linkage with external sites.
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