Rchr
J-GLOBAL ID：200901096363995557   Update date: Apr. 05, 2024

Aoyagi Masahiro

アオヤギ マサヒロ | Aoyagi Masahiro
Affiliation and department：
Kumamoto University Forefront Research and Education Center for Semiconductors

About Kumamoto University Forefront Research and Education Center for Semiconductors


Job title： Professor
Homepage URL  (1)： http://www.aist.go.jp/RESEARCHERDB/cgi-bin/worker_detail.cgi?call=namae&rw_id=M74124692
Research field  (2)： Electronic devices and equipment ,  Electric/electronic material engineering
Research keywords  (2)： 電子実装技術 低温エレクトロニクス ,  Low temperature electronics
Research theme for competitive and other funds  (1)：
  • 高密度電子集積・実装技術
Papers (57)：
  • Takeshi Ohkawa, Masahiro Aoyagi. FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D Standard Chip Stacking System. IEEE Symposium in Low-Power and High-Speed Chips. 2023. 1-3
  • Ying Ying Lim, Hiroshi Nakagawa, Masaru Hashino, Masahiro Aoyagi, Katsuya Kikuchi. Hardness Characteristics of Au Cone-Shaped Bumps Targeted for 3-D Packaging Applications. IEEE Transactions on Components, Packaging and Manufacturing Technology. 2019. 9. 3. 419-426
  • Shunsuke Nemoto, Ying Ying Lim, Hiroshi Nakagawa, Katsuya Kikuchi, Masahiro Aoyagi. Fine Cone-shaped Bumps for Three-dimensional LSI Package-An Optimization of Thermocompression Bonding Process. Sensors and Materials. 2018. 30. 12. 2905-2905
  • Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Katsuya Kikuchi, Masahiro Aoyagi. Designing efficient parallel processing in 3D standard-chip stacking system with standard bus. Proceedings - IEEE 11th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017. 2018. 2018-January. 128-135
  • Ying Ying Lim, Yee Mey Goh, Manabu Yoshida, Tung Thanh Bui, Masahiro Aoyagi, Changqing Liu. 30-GHz High-Frequency Application of Screen Printed Interconnects on an Organic Substrate. IEEE Transactions on Components, Packaging and Manufacturing Technology. 2017. 7. 9. 1506-1515
ｍore...
MISC (70)：
  • PDN Impedance Evaluation of Capacitor Embedded Interposer Using Narrow Gap Chip Parts Mounting Technology. 2015. 25. 273-276
  • Shirado Syunpei, Kikuchi Katsuya, Aoyagi Masahiro, Maeda Zyozi. B-10-61 Analysis of Optical Characteristics for Silicon Photonics Interposer with Vertical Light Wave Guide (VLWG). Proceedings of the IEICE General Conference. 2015. 2015. 2. 397-397
  • Development of Capacitor Embedded Interposers Using Narrow Gap Chip Parts Mounting Technology. 2014. 24. 73-76
  • AOYAGI Masahiro, BUI Thanh-Tung, KATO Fumiki, WATANABE Naoya, NEMOTO Shunsuke, KIKUCHI Katsuya. 15μm-pitch Bump Interconnections Relied on Flip-chip Bonding Technique : for Advanced Chip Stacking Applications. Technical report of IEICE. SDM. 2014. 113. 451. 43-46
  • Evaluation for Ultra-Wideband Ultra-Low Power Distribution Network Impedance of Decoupling Capacitor Embedded Interposers by Electromagnetic Field Analysis. 2013. 23. 253-256
ｍore...
Professional career (1)：
  • Doctor of Engineering
Awards (2)：
  • 第3回 つくば賞
  • 第19回 市村賞貢献賞(学術の部)
Association Membership(s) (10)：
応用物理学会 ,  IMAPS ,  電子情報通信学会 ,  IEEE ,  エレクトロニクス実装学会 ,  The Japan Society of Applied Physics ,  The International Society for Optical Engineering ,  Information and Communication Engineers ,  The Institute of Electronics ,  The Institute of Electrical and Electronics Engineers
※ Researcher’s information displayed in J-GLOBAL is based on the information registered in researchmap. For details, see here.

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