Art

J-GLOBAL ID：201002257865760705   Reference number：10A1754319

A10b, 20-MS/s, 2.6mW fully differential CBSC pipelined ADC in 0.18μm CMOS

0.18μm CMOSによる10b,20MS/s,2.6mW全差動CBSCパイプラインAD変換器

Author (4)： ZAMANI Majid (Dep. of Electrical Engineering, science and research Branch of Islamic Azad Univ.) ,  JAFARABADI-ASHTIANI Shahin (School of Electrical and Computer Engineering, Fac. of Engineering, Univ. of Tehran) ,  DOUSTI Masoud (Dep. of Electrical Engineering, science and research Branch of Islamic Azad Univ.) ,  NASER-MOGHADASI Mohammad (Dep. of Electrical Engineering, science and research Branch of Islamic Azad Univ.)
Material： IEICE Electronics Express (Web)  (IEICE Electron Express (Web))
Volume： 7  Issue： 23  Page： 1694-1701 (J-STAGE)  Publication year： 2010 
JST Material Number： U0039A  ISSN： 1349-2543  Document type： Article
Article type： 短報  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *analog to digital converter ,  *SC circuit ,  comparator ,  semiconductor ,  feedforward control ,  overshoot ,  compensation ,  complementary metal oxide semiconductor ,  *pipeline analog digital convrter
Semi thesaurus term： differential circuit

JST classification (1)： AD/DA conversion circuits  (NC05080M)

Reference (7)：

• [1] T. Sepke, J. K. Fiorenza, C. G. Sodini, P. Holloway, and H.-S. Lee, “Comparator-based switched-capacitor circuits for scaled CMOS technologies,” ISSCC Digest of Technical Papers, pp. 220-221, 2006.
• [2] J. K. Fiorenza, T. Sepke, P. Holloway, C. G. Sodini, and H.-S. Lee, “Comparator-based switched-capacitor circuits for scaled CMOS technologies,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2658-2668, 2006.
• [3] S.-K. Shin, Y.-S. You, S.-H. Lee, K.-H. Moon, J.-W. Kim, L. Brooks, and H.-S. Lee, “A fully-differential zero-crossing-based 1.2V 10b 26MS/ pipelined ADC in 65nm CMOS,” Proc. IEEE Symp. VLSI Circuits Dig Tech. Papers, pp. 218-219, June 2008.
• [4] R. Gregorian, Introduction to CMOS Op-Amps and Comparators, John Wiley and Sons, Inc., 1999.
• [5] M.-C. Huang and S.-I. Liu, “A 10MS/s to 100kS/s power-scalable fully-differential CBSC 10-bit pipelined ADC with adaptive biasing,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, pp. 11-15, Jan. 2010.

Terms in the title (3)： CMOS ,  差動 ,  パイプラインAD変換器