Art
J-GLOBAL ID:201702226387838383   Reference number:17A0145553

Study on offset reduction method for a fully differential filter employing symmetrical floating impedance scaling circuits

対称非接地型インピーダンススケーリング回路を用いた完全差動フィルタのためのオフセット低減法に関する研究【Powered by NICT】
Author (5):
Material:
Volume: 2016  Issue: ISPACS  Page: 1-5  Publication year: 2016 
JST Material Number: W2441A  Document type: Proceedings
Article type: 原著論文  Country of issue: United States (USA)  Language: ENGLISH (EN)
Abstract/Point:
Abstract/Point
Japanese summary of the article(about several hundred characters).
All summary is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
In this paper, a method to red...
   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=17A0145553&from=J-GLOBAL&jstjournalNo=W2441A") }}
Thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
, 【Automatic Indexing@JST】
JST classification (2):
JST classification
Category name(code) classified by JST.
Semiconductor integrated circuit  ,  Amplification circuits 

Return to Previous Page