Art

J-GLOBAL ID：201702245150200201   Reference number：17A0057840

Recent advances in low temperature process in view of 3D VLSI integration

3D VLSI集積の観点からの低温度プロセスの最近の進歩【Powered by NICT】

Author (33)： Fenouillet-Beranger C. (CEA, Leti, MINATEC Campus) ,  Batude P. (CEA, Leti, MINATEC Campus) ,  Brunet L. (CEA, Leti, MINATEC Campus) ,  Mazzocchi V. (CEA, Leti, MINATEC Campus) ,  Lu C-M.V. (STMicroelectronics, France) ,  Deprat F. (CEA, Leti, MINATEC Campus) ,  Micout J. (CEA, Leti, MINATEC Campus) ,  Samson M-P. (STMicroelectronics, France) ,  Previtali B. (CEA, Leti, MINATEC Campus) ,  Besombes P. (CEA, Leti, MINATEC Campus) ,  Rambal N. (CEA, Leti, MINATEC Campus) ,  Lapras V. (CEA, Leti, MINATEC Campus) ,  Andrieu F. (CEA, Leti, MINATEC Campus) ,  Billoint O. (CEA, Leti, MINATEC Campus) ,  Brocard M. (CEA, Leti, MINATEC Campus) ,  Thuries S. (CEA, Leti, MINATEC Campus) ,  Cibrario G. (CEA, Leti, MINATEC Campus) ,  Acosta-Alba P. (CEA, Leti, MINATEC Campus) ,  Mathieu B. (CEA, Leti, MINATEC Campus) ,  Kerdiles S. (CEA, Leti, MINATEC Campus) ,  Nemouchi F. (CEA, Leti, MINATEC Campus) ,  Arvet C. (STMicroelectronics, France) ,  Besson P. (STMicroelectronics, France) ,  Loup V. (CEA, Leti, MINATEC Campus) ,  Gassilloud R. (CEA, Leti, MINATEC Campus) ,  Garros X. (CEA, Leti, MINATEC Campus) ,  Leroux C. (CEA, Leti, MINATEC Campus) ,  Beugin V. (CEA, Leti, MINATEC Campus) ,  Guerin C. (CEA, Leti, MINATEC Campus) ,  Benoit D. (STMicroelectronics, France) ,  Pasini L. (CEA, Leti, MINATEC Campus) ,  Hartmann J-M. (CEA, Leti, MINATEC Campus) ,  Vinet M. (CEA, Leti, MINATEC Campus)
Material： IEEE Conference Proceedings  (IEEE Conf Proc)
Volume： 2016  Issue： S3S  Page： 1-3  Publication year： 2016 
JST Material Number： W2441A  Document type： Proceedings
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)

Abstract/Point： In this paper, the recent adva...

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Thesaurus term： optimization ,  *low temperature ,  epitaxy ,  upper layer ,  spacer ,  *three dimension ,  heat balance ,  dopant ,  silicide ,  *VLSI ,  low temperature process ,  modification
Semi thesaurus term： ゲートスタック , 【Automatic Indexing@JST】

JST classification (3)： Transistors  (NC03070N) ,  Manufacturing technology of solid-state devices  (NC03030V) ,  Semiconductor integrated circuit  (NC03162T)

Terms in the title (6)： 3D ,  VLSI ,  集積 ,  観点 ,  低温度 ,  プロセス