Ishihara Shota

Affiliation and department：
Papers (10)：

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MISC (12)：

Zhengfan XIA, Shota ISHIHARA, Masanori HARIYAMA, Michitaka KAMEYAMA. An Asynchronous FPGA Based on Dual/Single-Rail Hybrid Architecture. Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). 2012. 139-142
Zhengfan Xia, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama. Dual-Rail/Single-Rail Hybrid Logic Design for High-Performance Asynchronous Circuit. Proc. IEEE International Symposium on Circuits and Systems (ISCAS). 2012. 3017-3020
Masanori Hariyama, Yoshiya Komatsu, Shota Ishihara, Ryoto Tsuchiya, Michitaka Kameyama. An FPGA Based on Synchronous/Asynchronous Hybrid Architecture with Area-Efficient FIFO Interfaces. Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). 2011. 331-334
Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama. An Implementation of an Asychronous FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture. Proc. Asia and South Pacific Design Automation Conference (ASP-DAC). 2011. 89-90
Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, Michitaka Kameyama. An Field-Programmable VLSI Based on Synchronous/Asynchronous Hybrid Architecture. Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). 2010. 271-274

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Lectures and oral presentations (13)：

A Design Method of High-Performance Asynchronous Pipeline
(Student Organizing International Mini-Conference on Information Electronics Systems (SOIM), pp. 276-277 2012)
An Architecture of a Synchronous / Asynchronous Hybrid FPGA
(Student-Organizing International Mini-Conference on Information Electronics Systems (SOIM), 274-275 2012)
同期/非同期ハイブリッドアーキテクチャに基づく低消費電力FPGAの評価
(電子情報通信学会技術研究報告(信学技報), Vol.111, No.388, ICD2011-142 2012)
Implementation of a Low-Power FPGA Based on Self-Adaptive Voltage Control
(Proc. Student Organizing International Mini-Conference on Information Electronics Systems (SOIM), pp. 57-58 2010)
同期/非同期ハイブリッドアーキテクチャに基づく低消費電力FPGAの構成
(電子情報通信学会技術研究報告(信学技報), Vol.110, No. 204, RECONF2010-33, pp.91-95 2010)

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Education (3)：

Professional career (1)：

Committee career (1)：

Awards (7)：

2012 - RIEC Award 東北大学学生賞自律的低消費電力化に基づくリコンフィギャラブルVLSIアーキテクチャに関する研究
2012 - 東北大学大学院情報科学研究科研究科長賞自律電源電圧制御に基づく低消費電力リコンフィギャラブルVLSIアーキテクチャに関する研究
2012 - 丹羽保次郎記念論文賞 Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama, "A Low-Power FPGA Based on Autonomous Fine-Grain Power Gating", IEEE Transactions on Very Large Scale Integration Systems, Vol. 19, No. 8, pp. 1394-1406, 2011
2011 - 電子情報通信学会東北支部学生ブランチ活動奨励賞
2010 - 情報処理学会 SLDM研究会優秀学生発表賞 "自律適応電源電圧制御に基づく低消費電力FPGAの構成", 電子情報通信学会技術研究報告(信学技報), Vol.109, No.395, VLD2009-84, CPSY2009-66, RECONF2009-69, pp. 95-99, 2010

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Association Membership(s) (3)：

INFORMATION PROCESSING SOCIETY OF JAPAN , THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS , IEEE

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