Rchr
J-GLOBAL ID：201401048018334292
Update date: Aug. 31, 2020
Nitayama Akihiro
ニタヤマ アキヒロ | Nitayama Akihiro
Homepage URL (2)：
http://db.tohoku.ac.jp/whois/detail/ff000f41a0255f23463589ba92cf95cc.html
,
http://db.tohoku.ac.jp/whois/detail/ff000f41a0255f23463589ba92cf95cc.html
Research keywords (4)：
集積化プロセス
, 半導体デバイス
, Process Integration
, Semiconductor Device
MISC (138)：
Nitayama, A, Aochi, H. Bit Cost Scalable (BiCS) technology for future ultra high density memories. Int. Symp. VLSI Technol., Syst. Appl., VLSI-TSA. 2013. 6545626
Nitayama, A, Aochi, H. Bit Cost Scalable (BiCS) technology for future ultra high density storage memories. Dig Tech Pap Symp VLSI Technol. 2013. 6576685
Akihiro Nitayama, Hideaki Aochi. Bit Cost Scalable (BiCS) technology for future ultra high density memories. 2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013. 2013. 6545626
Nitayama, A, Aochi, H. Bit Cost Scalable (BiCS) technology for future ultra high density storage memories. Dig Tech Pap Symp VLSI Technol. 2013. 6576685
Takashima, D, Shiga, H, Hashimoto, D, Miyakawa, T, Shiratake, S.-I, Hoya, K, Ogiwara, R, Takizawa, R, Doumae, S, Fukuda, R, et al. A scalable shield-bitline-overdrive technique for sub-1.5 v chain FeRAMs. IEEE J Solid State Circuits. 2011. 46. 9. 5954136
ｍore...
Professional career (1)：
工学博士 (東京大学)
Work history (1)：
Tohoku University Center for Innovative Integrated Electronic Systems, Strategic Planning Division Professor
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