N. Ishiura, Y. Oosako. Introducing Real Constraints in Partitioned ILP-Based Biding in High-Level Synthesis. Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016). 2016. 303-304
H. Takebayashi, N. Ishiura, K. Azuma, N. Yoshida, H. Kanbara. High-Level Synthesis of Embedded Systems Controller from Erlang. Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016). 2016. 285-290
M. Shimizu, N. Ishiura. Extending Distributed Control for High-Level Synthesis beyond Borders of Basic Blocks. Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016). 2016. 172-177
K. Tanaka, N. Ishiura, M. Nishimura, A. Fukui. Random Testing Back-end of Compiler Infrastructure LLVM. Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016). 2016. 88-89
M. Iwatsuji, A. Hashimoto, N. Ishiura. Detecting Missed Arithmetic Optimization in C Compilers by Differential Random Testing. Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016). 2016. 2-3