研究者
J-GLOBAL ID：200901057244333575   更新日: 2008年06月12日

Marakhovsky Vyacheslav

マラコフスキー バチェスラ | Vyacheslav Marakhovsky
所属機関・部署：
旧所属 会津大学 コンピューター理工学部 コンピューター ハードウェア学科

旧所属 会津大学 コンピューター理工学部 コンピューター ハードウェア学科 について


ホームページURL (1件)： http://www.u-aizu.ac.jp/~marak
研究分野 (1件)： 電子デバイス、電子機器
研究キーワード (6件)： Neuro-Fuzzy Devices ,  Homogeneous Structures ,  Interacting Automata ,  Logical Design ,  Self-Timing ,  Asynchronouse Design
競争的資金等の研究課題 (3件)：
  • CMOS Neuro-Fuzzy Circuits and Devices
  • Design of Asynchronous Computing Devices.
  • CMOS Neuro-Fuzzy Circuits and Devices
MISC (49件)：
もっと見る
特許 (46件)：
  • Sequential counter (jointly worked)
  • Device for comparing of two m-bit numbers (jointly worked)
  • Shift register (jointly worked)
  • Sequential single-bit binary adder (jointly worked)
  • Sequential single bit binary adder (jointly worked)
もっと見る
書籍 (5件)：
  • GALA (Globally Asynchronous - Locally Arbitrary) Design (jointly worked)
    Springer, LNCS 2549, Concurrency and Hardware Design, Advances in Petri Nets}, Jordi Cortadella, Alex Yakovlev, and Grzegorz Rozenberg (Eds.) 2002
  • Aperiodic Circuitry (jointly worked, in Russian).
    Artificial Intelligence: in 3 Books. Book 3. Software and Hardware: Reference Book 1990
  • Self-Timed Control of Concurrent Processes (jointly worked)
    Kluwer Academic Publishes Group, 1990
  • Aperiodic Automata (jointly worked, in Russian)
    Nauka 1976
  • Homogeneity Structure. Analysis. Synthesis. Behaviour. (joint worked, in Russian)
    Energiya 1973
Works (8件)：
  • R&D project "Methods and software support of self-timed circuit design", contract with the Microelectronics Center (Zelenograd, Russia), general executor.
    1989 - 1993
  • R&D project "Trassa-Pin" - Design methods of an integrated circuit set for new generation of computing systems and personal computers; contract with the Institute of Informatics Problem of AS USSR, g・・・
    1988 - 1993
  • Self-timed communication device for a multi-processor super-computer with cluster structure; contract with Scientific and Production Union "KVANT"(Russia), general executor;
    1990 - 1991
  • Logical project of self-timed first-in-first-out biport duffer memory , joint research with IRCA Ltd Comp. and Tompson CGS Company (Milano, Italy); general executor;
    1989 - 1990
  • Design of fault-tolerant (self-recovery) self-timed ring channel for multi-computer air-borne system; contract with Ufa Instrumentation Plant (Russia), general executor;
    1985 - 1986
もっと見る
学歴 (2件)：
  • - 1970 Graduate School of the Central Institute of Economics and Mathematics, USSR Academy of Science Graduate School, Division of Engineering Science Engineering Cybernetics and Information Theory
  • - 1963 Leningrad Politechnical Institute Faculty of Engineering and Design Automation and Remote Control
学位 (3件)：
  • Doctor of Engineering in Computer Science (1992), St.Petersburg Electrical Engineering University, Russia
  • Ph.D. in Engineering Cybernetics and Information Theory (1970), Cental Institute of Economics and Mathematics, USSR Academy of Science, Russia
  • Dipl. Eng. in Electrical Engineering (1963), Leningrad Politechnical Institute, Russia
委員歴 (1件)：
  • 1993 - IEEE and ACM member
所属学会 (1件)：
IEEE and ACM
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