T. Tanaka, K. Kishine, A. Tsuchiya, H. Inaba, D. Omoto. A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS. IEIE Transactions on Smart Signal and Computing. 2016. 5. 3. 207-214
A 32-Gb/s output buffer circuit with doubled pre-emphasis in 65-nm CMOS. International Conference on Electronics, Information, and Communication. 2016
Impact of Anomalous Skin Effect on Metal Wire for Terahertz Integrated Circuit
(IEEE International Symposium on Radio-Frequency Integration Technology 2015)
Design of Multi-Layered On-Chip Inductor for Inductive Peaking
(Vietnum-Japan MicroWave 2015 2015)