文献
J-GLOBAL ID:200902230086408080
整理番号:09A0404781
多面的クロッキングとISI/SSN-低減技術を用いた60nm 6Gb/s/pin GDDR5グラフィックスDRAM
A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques
著者 (26件):
BAE Seung-Jun
(Samsung Electronics, Hwasung, KOR)
,
SOHN Young-Soo
(Samsung Electronics, Hwasung, KOR)
,
PARK Kwang-Il
(Samsung Electronics, Hwasung, KOR)
,
KIM Kyoung-Ho
(Samsung Electronics, Hwasung, KOR)
,
CHUNG Dae-Hyun
(Samsung Electronics, Hwasung, KOR)
,
KIM Jin-Gook
(Samsung Electronics, Hwasung, KOR)
,
KIM Si-Hong
(Samsung Electronics, Hwasung, KOR)
,
PARK Min-Sang
(Samsung Electronics, Hwasung, KOR)
,
LEE Jae-Hyung
(Samsung Electronics, Hwasung, KOR)
,
BANG Sam-Young
(Samsung Electronics, Hwasung, KOR)
,
LEE Ho-Kyung
(Samsung Electronics, Hwasung, KOR)
,
PARK In-Soo
(Samsung Electronics, Hwasung, KOR)
,
KIM Jae-Sung
(Samsung Electronics, Hwasung, KOR)
,
KIM Dae-Hyun
(Samsung Electronics, Hwasung, KOR)
,
KIM Hye-Ran
(Samsung Electronics, Hwasung, KOR)
,
SHIN Yong-Jae
(Samsung Electronics, Hwasung, KOR)
,
PARK Cheol-Goo
(Samsung Electronics, Hwasung, KOR)
,
MOON Gil-Shin
(Samsung Electronics, Hwasung, KOR)
,
YEOM Ki-Woong
(Samsung Electronics, Hwasung, KOR)
,
KIM Kang-Young
(Samsung Electronics, Hwasung, KOR)
,
LEE Jae-Young
(Samsung Electronics, Hwasung, KOR)
,
YANG Hyang-Ja
(Samsung Electronics, Hwasung, KOR)
,
JANG Seong-Jin
(Samsung Electronics, Hwasung, KOR)
,
CHOI Joo Sun
(Samsung Electronics, Hwasung, KOR)
,
JUN Young-Hyun
(Samsung Electronics, Hwasung, KOR)
,
KIM Kinam
(Samsung Electronics, Hwasung, KOR)
資料名:
Digest of Technical Papers. IEEE International Solid-State Circuits Conference
(Digest of Technical Papers. IEEE International Solid-State Circuits Conference)
巻:
2008 Vol.1
ページ:
278-279,613
発行年:
2008年
JST資料番号:
D0753A
ISSN:
0193-6530
資料種別:
会議録 (C)
記事区分:
短報
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)