文献
J-GLOBAL ID:200902295335543108
整理番号:09A1099332
全周ゲートシリコンナノワイヤトランジスタの1/f雑音に与えるゲート電極の影響
Impact of Gate Electrodes on 1/f Noise of Gate-All-Around Silicon Nanowire Transistors
著者 (10件):
WEI Chengqing
(Nanyang Technological Univ., Singapore, SGP)
,
WEI Chengqing
(Agency for Sci., Technol. and Res., Singapore, SGP)
,
JIANG Yu
(Agency for Sci., Technol. and Res., Singapore, SGP)
,
JIANG Yu
(National Univ. Singapore, Singapore, SGP)
,
XIONG Yong-Zhong
(Agency for Sci., Technol. and Res., Singapore, SGP)
,
ZHOU Xing
(Nanyang Technological Univ., Singapore, SGP)
,
SINGH Navab
(Agency for Sci., Technol. and Res., Singapore, SGP)
,
RUSTAGI Subhash C.
(Agency for Sci., Technol. and Res., Singapore, SGP)
,
LO Guo Qiang
(Agency for Sci., Technol. and Res., Singapore, SGP)
,
KWONG Dim-Lee
(Agency for Sci., Technol. and Res., Singapore, SGP)
資料名:
IEEE Electron Device Letters
(IEEE Electron Device Letters)
巻:
30
号:
10
ページ:
1081-1083
発行年:
2009年10月
JST資料番号:
B0344B
ISSN:
0741-3106
CODEN:
EDLEDZ
資料種別:
逐次刊行物 (A)
記事区分:
短報
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)