文献
J-GLOBAL ID:201202232910026882
整理番号:12A0273764
COGRE:面積最小化のための新しい小型論理セルアーキテクチャ
COGRE: A Novel Compact Logic Cell Architecture for Area Minimization
著者 (5件):
IIDA Masahiro
(Graduate School of Sci. and Technol., Kumamoto Univ.)
,
AMAGASAKI Motoki
(Graduate School of Sci. and Technol., Kumamoto Univ.)
,
OKAMOTO Yasuhiro
(Graduate School of Sci. and Technol., Kumamoto Univ.)
,
ZHAO Qian
(Graduate School of Sci. and Technol., Kumamoto Univ.)
,
SUEYOSHI Toshinori
(Graduate School of Sci. and Technol., Kumamoto Univ.)
資料名:
IEICE Transactions on Information and Systems (Institute of Electronics, Information and Communication Engineers)
(IEICE Transactions on Information and Systems (Institute of Electronics, Information and Communication Engineers))
巻:
E95-D
号:
2
ページ:
294-302 (J-STAGE)
発行年:
2012年
JST資料番号:
L1371A
ISSN:
0916-8532
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
日本 (JPN)
言語:
英語 (EN)