文献
J-GLOBAL ID:201602276865852427
整理番号:16A0802272
超低電力回路解析のためのTFETSPICEモデルの実装【Powered by NICT】
Implementation of TFET SPICE Model for Ultra-Low Power Circuit Analysis
著者 (6件):
Tanaka Chika
(Advanced LSI Technology Laboratory, Corporate Research and Development Center, Toshiba Corporation, Kawasaki, Japan)
,
Adachi Kanna
(Center for Semiconductor Research and Development, Semiconductor and Storage Company, Toshiba Corporation, Kawasaki, Japan)
,
Fujimatsu Motohiko
(Center for Semiconductor Research and Development, Semiconductor and Storage Company, Toshiba Corporation, Kawasaki, Japan)
,
Hokazono Akira
(Center for Semiconductor Research and Development, Semiconductor and Storage Company, Toshiba Corporation, Kawasaki, Japan)
,
Kondo Yoshiyuki
(Center for Semiconductor Research and Development, Semiconductor and Storage Company, Toshiba Corporation, Kawasaki, Japan)
,
Kawanaka Shigeru
(Center for Semiconductor Research and Development, Semiconductor and Storage Company, Toshiba Corporation, Kawasaki, Japan)
資料名:
IEEE Journal of the Electron Devices Society
(IEEE Journal of the Electron Devices Society)
巻:
4
号:
5
ページ:
273-277
発行年:
2016年
JST資料番号:
W2429A
ISSN:
2168-6734
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)