文献
J-GLOBAL ID:201602288979202784
整理番号:13A1264635
Universal trench design method for a high-voltage SOI trench LDMOS
著者 (4件):
Hu Xiarong
(Univ. of Electronic Sci. and Technol. of China State Key Lab. of Electronic Thin Films and Integrated Devices, Chengdu)
,
Zhang Bo
(Univ. of Electronic Sci. and Technol. of China State Key Lab. of Electronic Thin Films and Integrated Devices, Chengdu)
,
Luo Xiaorong
(Univ. of Electronic Sci. and Technol. of China State Key Lab. of Electronic Thin Films and Integrated Devices, Chengdu)
,
Li Zhaoji
(Univ. of Electronic Sci. and Technol. of China State Key Lab. of Electronic Thin Films and Integrated Devices, Chengdu)
資料名:
Journal of Semiconductors
(Journal of Semiconductors)
巻:
33
号:
7
ページ:
074006-1-074006-4
発行年:
2012年
JST資料番号:
C2377A
ISSN:
1674-4926
資料種別:
逐次刊行物 (A)
発行国:
中国 (CHN)
言語:
英語 (EN)