文献
J-GLOBAL ID:201702212170219234
整理番号:17A0415030
0.18μm-CMOSにおける注入同期CDRの回路設計段階に対する行動モデリング【Powered by NICT】
Behavioral modeling to circuit design steps of an injection locked CDR in 0.18μm-CMOS
著者 (7件):
Weilin Xu
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
,
Di Wu
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
,
Chaoyong Zhu
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
,
Jihai Duan
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
,
Baolin Wei
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
,
Xueming Wei
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
,
Fabi Zhang
(Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, 541004, China)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2016
号:
ASID
ページ:
96-99
発行年:
2016年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)