文献
J-GLOBAL ID:201702213030290232
整理番号:17A0020888
電力効率の良い論理回路のための縮小サブギャップDOSを用いた低電圧有機薄膜トランジスタ【Powered by NICT】
Low voltage organic thin-film transistor with reduced sub-gap DOS for power efficient logic circuits
著者 (4件):
Zhao Jiaquing
(National Engineering Laboratory for TFT-LCD Materials and Technologies Department of Electronic Engineering, School of the Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, China)
,
Tang Wei
(National Engineering Laboratory for TFT-LCD Materials and Technologies Department of Electronic Engineering, School of the Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, China)
,
Yu Pengfei
(National Engineering Laboratory for TFT-LCD Materials and Technologies Department of Electronic Engineering, School of the Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, China)
,
Guo Xiaojun
(National Engineering Laboratory for TFT-LCD Materials and Technologies Department of Electronic Engineering, School of the Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, China)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2016
号:
CAD-TFT
ページ:
1
発行年:
2016年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)