文献
J-GLOBAL ID:201702213862616897
整理番号:17A0667751
源離散分布を改善したV pLDMOS SCR(p n p arranged)デバイスのためのESD保護設計【Powered by NICT】
ESD protection design for the 45-V pLDMOS-SCR (p-n-p-arranged) devices with source-discrete distributions
著者 (7件):
Chen Shen-Li
(Dept. of Electronic Engineering, National United University, MiaoLi City 36063, Taiwan)
,
Huang Yu-Ting
(Dept. of Electronic Engineering, National United University, MiaoLi City 36063, Taiwan)
,
Yen Chih-Ying
(Dept. of Electronic Engineering, National United University, MiaoLi City 36063, Taiwan)
,
Chen Kuei-Jyun
(Dept. of Electronic Engineering, National United University, MiaoLi City 36063, Taiwan)
,
Wu Yi-Cih
(Dept. of Electronic Engineering, National United University, MiaoLi City 36063, Taiwan)
,
Lin Jia-Ming
(Dept. of Integrated Circuits Design and Engineering, School of Software and Microelectronics, Peking University, Wuxi City 214125, China)
,
Yang Chih-Hung
(Dept. of Electronic Engineering, National United University, MiaoLi City 36063, Taiwan)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2016
号:
GCCE
ページ:
1-2
発行年:
2016年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)