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J-GLOBAL ID:201702216281422363
整理番号:17A1567892
トンネルFETとMOSFETのための性能ブースタとしての負性静電容量:実験的研究【Powered by NICT】
Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study
著者 (9件):
Saeidi Ali
(Laboratory of Micro and Nano-Electronic Devices, E ́cole Polytechnique Fe ́de ́rale de Lausanne, Lausanne, Switzerland)
,
Jazaeri Farzan
(Laboratory of Integrated Circuits, E ́cole Polytechnique Fe ́de ́rale de Lausanne, Lausanne, Switzerland)
,
Bellando Francesco
(Laboratory of Micro and Nano-Electronic Devices, E ́cole Polytechnique Fe ́de ́rale de Lausanne, Lausanne, Switzerland)
,
Stolichnov Igor
(Laboratory of Micro and Nano-Electronic Devices, E ́cole Polytechnique Fe ́de ́rale de Lausanne, Lausanne, Switzerland)
,
Luong Gia V.
(Forschungszentrum Juelich, Peter Gruenberg Institute 9 (PGI-9), Juelich, Germany)
,
Zhao Qing-Tai
(Forschungszentrum Juelich, Peter Gruenberg Institute 9 (PGI-9), Juelich, Germany)
,
Mantl Siegfried
(Forschungszentrum Juelich, Peter Gruenberg Institute 9 (PGI-9), Juelich, Germany)
,
Enz Christian C.
(Laboratory of Integrated Circuits, E ́cole Polytechnique Fe ́de ́rale de Lausanne, Lausanne, Switzerland)
,
Ionescu Adrian M.
(Laboratory of Micro and Nano-Electronic Devices, E ́cole Polytechnique Fe ́de ́rale de Lausanne, Lausanne, Switzerland)
資料名:
IEEE Electron Device Letters
(IEEE Electron Device Letters)
巻:
38
号:
10
ページ:
1485-1488
発行年:
2017年
JST資料番号:
B0344B
ISSN:
0741-3106
CODEN:
EDLEDZ
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)