文献
J-GLOBAL ID:201702218921220483
整理番号:17A0966370
SSDのための実験とシミュレーションボードレベル落下試験の間の相関に関する研究【Powered by NICT】
A study on the correlation between experiment and simulation board level drop test for SSD
著者 (5件):
Tae Min Kang
(SK hynix Semiconductor Inc., NAND Solution Development Division, Solution Hardware, Seongnam-si, Gyeonggi-do, 463-844, Republic of Korea)
,
Yong Chang Lee
(SK hynix Semiconductor Inc., NAND Solution Development Division, Solution Hardware, Seongnam-si, Gyeonggi-do, 463-844, Republic of Korea)
,
Byung Kwon Bae
(SK hynix Semiconductor Inc., NAND Solution Development Division, Solution Hardware, Seongnam-si, Gyeonggi-do, 463-844, Republic of Korea)
,
Won Seob Song
(SK hynix Semiconductor Inc., NAND Solution Development Division, Solution Hardware, Seongnam-si, Gyeonggi-do, 463-844, Republic of Korea)
,
Jae Sung Lee
(SK hynix Semiconductor Inc., NAND Solution Development Division, Solution Hardware, Seongnam-si, Gyeonggi-do, 463-844, Republic of Korea)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
EuroSimE
ページ:
1-6
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)