文献
J-GLOBAL ID:201702220433407130
整理番号:17A0214242
3D VRRAMメモリカーネルを用いた超次元計算,エネルギー効率の良い誤り耐性言語認識のためのデバイスアーキテクチャ協調設計【Powered by NICT】
Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition
著者 (18件):
Li Haitong
(Stanford University, USA)
,
Wu Tony F.
(Stanford University, USA)
,
Rahimi Abbas
(University of California, Berkeley, USA)
,
Li Kai-Shin
(National Nano Device Laboratories, Taiwan)
,
Rusch Miles
(University of California, Berkeley, USA)
,
Lin Chang-Hsien
(National Nano Device Laboratories, Taiwan)
,
Hsu Juo-Luen
(National Nano Device Laboratories, Taiwan)
,
Sabry Mohamed M.
(Stanford University, USA)
,
Eryilmaz S. Burc
(Stanford University, USA)
,
Sohn Joon
(Stanford University, USA)
,
Chiu Wen-Cheng
(National Nano Device Laboratories, Taiwan)
,
Chen Min-Cheng
(National Nano Device Laboratories, Taiwan)
,
Wu Tsung-Ta
(National Nano Device Laboratories, Taiwan)
,
Shieh Jia-Min
(National Nano Device Laboratories, Taiwan)
,
Yeh Wen-Kuan
(National Nano Device Laboratories, Taiwan)
,
Rabaey Jan M.
(University of California, Berkeley, USA)
,
Mitra Subhasish
(Stanford University, USA)
,
Wong H.-S. Philip
(Stanford University, USA)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2016
号:
IEDM
ページ:
16.1.1-16.1.4
発行年:
2016年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)