文献
J-GLOBAL ID:201702222877345160
整理番号:17A0024116
低電力定在波発振器を基にしたクロック分配ネットワークの階層的設計【Powered by NICT】
Hierarchical design of a low power standing wave oscillator based clock distribution network
著者 (9件):
Zhang Wei
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Hu Youde
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Huan Yuxiang
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Zou Zhuo
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Cui Keji
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Bao Dongxuan
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Pan Dashan
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Wang Lebo
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
,
Zheng Lirong
(State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2016
号:
NORCAS
ページ:
1-5
発行年:
2016年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)