文献
J-GLOBAL ID:201702226549375085
整理番号:17A1645890
低電力応用のための近閾値領域における断熱加算器の設計と解析【Powered by NICT】
Design and analysis of adiabatic adder in near-Threshold regime for low power application
著者 (5件):
Podder Anindita
(Department of Electronics and Communication Engineering, Meghnad Saha Institute of Technology, Kolkata, India)
,
Mal Sandipta
(Department of Electronics and Communication Engineering, Meghnad Saha Institute of Technology, Kolkata, India)
,
Chowdhury Anirban
(Department of Electronics and Communication Engineering, Meghnad Saha Institute of Technology, Kolkata, India)
,
Mondal Akash
(Department of Electronics and Communication Engineering, Meghnad Saha Institute of Technology, Kolkata, India)
,
Chanda Manash
(Nano Device Simulation Lab, Jadavpur University, Kolkata, India)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
DevIC
ページ:
670-675
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)