文献
J-GLOBAL ID:201702228011970465
整理番号:17A1391390
VEGa:ハイブリッドFPGA上の高性能車両イーサネットゲートウェイ【Powered by NICT】
VEGa: A High Performance Vehicular Ethernet Gateway on Hybrid FPGA
著者 (7件):
Shreejith Shanker
(School of Engineering, University of Warwick, Coventry, United Kingdom)
,
Mundhenk Philipp
(Technical University of Munich Campus for Research Excellence and Technological Enterprise, Singapore)
,
Ettner Andreas
(Technical University of Munich Campus for Research Excellence and Technological Enterprise, Singapore)
,
Fahmy Suhaib A.
(School of Engineering, University of Warwick, Coventry, United Kingdom)
,
Steinhorst Sebastian
(Department of Electrical and Computer Engineering, Technical University of Munich, Munchen, Germany)
,
Lukasiewycz Martin
(Technical University of Munich Campus for Research Excellence and Technological Enterprise, Singapore)
,
Chakraborty Samarjit
(Institute for Real-time Computer Systems, Technical University of Munich, Munchen, Germany)
資料名:
IEEE Transactions on Computers
(IEEE Transactions on Computers)
巻:
66
号:
10
ページ:
1790-1803
発行年:
2017年
JST資料番号:
C0233A
ISSN:
0018-9340
CODEN:
ICTOB4
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)