文献
J-GLOBAL ID:201702233704882215
整理番号:17A0443334
フォールトセキュア論理を用いた量子ドットセルラオートマトンにおける試験可能加算器の設計【Powered by NICT】
Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic
著者 (4件):
Goswami Mrinal
(Department of Computer Science and Engineering, National Institute of Technology Durgapur, West Bengal, India)
,
Sen Bibhash
(Department of Computer Science and Engineering, National Institute of Technology Durgapur, West Bengal, India)
,
Mukherjee Rijoy
(Department of Computer Science and Engineering, National Institute of Technology Durgapur, West Bengal, India)
,
Sikdar Biplab K
(Department of Computer Science and Technology, Indian Institute of Engineering Science and Technology Shibpur, West Bengal, India)
資料名:
Microelectronics Journal
(Microelectronics Journal)
巻:
60
ページ:
1-12
発行年:
2017年
JST資料番号:
A0186A
ISSN:
0026-2692
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)