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J-GLOBAL ID:201702242656172136
整理番号:17A0795473
センス増幅器ハーフバッファ(SAHB)低電力高性能非同期論理QDI細胞テンプレート【Powered by NICT】
Sense Amplifier Half-Buffer (SAHB) A Low-Power High-Performance Asynchronous Logic QDI Cell Template
著者 (5件):
Chong Kwen-Siong
(Temasek Laboratories, Nanyang Technological University, Singapore)
,
Ho Weng-Geng
(Temasek Laboratories, Nanyang Technological University, Singapore)
,
Lin Tong
(Temasek Laboratories, Nanyang Technological University, Singapore)
,
Gwee Bah-Hwee
(Virtus, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore)
,
Chang Joseph S.
(Virtus, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore)
資料名:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(IEEE Transactions on Very Large Scale Integration (VLSI) Systems)
巻:
25
号:
2
ページ:
402-415
発行年:
2017年
JST資料番号:
W0516A
ISSN:
1063-8210
CODEN:
ITCOB4
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)