文献
J-GLOBAL ID:201702246886413624
整理番号:17A0794815
サブ20nm CMOSのための高性能埋込STT-MRAMのための100 μA以下のサブIII nsパルスでの1×2×-nmの垂直MTJスイッチング【Powered by NICT】
$1¥times$ - to $2¥times$ -nm perpendicular MTJ Switching at Sub-3-ns Pulses Below $100¥mu$ A for High-Performance Embedded STT-MRAM for Sub-20-nm CMOS
著者 (11件):
Saida Daisuke
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Kashiwada Saori
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Yakabe Megumi
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Daibou Tadaomi
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Fukumoto Miyoshi
(Graduate School of Engineering Science, Osaka University, Toyonaka, Japan)
,
Miwa Shinji
(Graduate School of Engineering Science, Osaka University, Toyonaka, Japan)
,
Suzuki Yoshishige
(Graduate School of Engineering Science, Osaka University, Toyonaka, Japan)
,
Abe Keiko
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Noguchi Hiroki
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Ito Junichi
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
,
Fujita Shinobu
(Toshiba Corporate Research and Development Center, Kawasaki, Japan)
資料名:
IEEE Transactions on Electron Devices
(IEEE Transactions on Electron Devices)
巻:
64
号:
2
ページ:
427-431
発行年:
2017年
JST資料番号:
C0222A
ISSN:
0018-9383
CODEN:
IETDAI
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)