文献
J-GLOBAL ID:201702252840443537
整理番号:17A0880568
bits/cellスプリットゲートフラッシュメモリセルのためのマクロSPICEモデル【Powered by NICT】
A macro SPICE model for 2-bits/cell split-gate flash memory cell
著者 (11件):
Liu Xiaonian
(State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-system and Information Technology, CAS, 865, Changning Road, Shanghai, China)
,
Liu Xiaonian
(University of Chinese Academy of Sciences, 19A Yuquan Road, Beijing, China)
,
Liu Xiaonian
(Shanghai Huahong Grace Semiconductor Manufacturing Corporation, 288 Halei Road, Shanghai, China)
,
Xu Yiran
(State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-system and Information Technology, CAS, 865, Changning Road, Shanghai, China)
,
Xu Yiran
(University of Chinese Academy of Sciences, 19A Yuquan Road, Beijing, China)
,
Xu Yiran
(Shanghai Huahong Grace Semiconductor Manufacturing Corporation, 288 Halei Road, Shanghai, China)
,
Fan Xiangquan
(Shanghai Huahong Grace Semiconductor Manufacturing Corporation, 288 Halei Road, Shanghai, China)
,
Liao Mengxing
(Shanghai Huahong Grace Semiconductor Manufacturing Corporation, 288 Halei Road, Shanghai, China)
,
Li Pingliang
(Shanghai Huahong Grace Semiconductor Manufacturing Corporation, 288 Halei Road, Shanghai, China)
,
Zou Shichang
(State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-system and Information Technology, CAS, 865, Changning Road, Shanghai, China)
,
Zou Shichang
(Shanghai Huahong Grace Semiconductor Manufacturing Corporation, 288 Halei Road, Shanghai, China)
資料名:
Microelectronics Journal
(Microelectronics Journal)
巻:
63
ページ:
75-80
発行年:
2017年
JST資料番号:
A0186A
ISSN:
0026-2692
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)