文献
J-GLOBAL ID:201702256505351623
整理番号:17A0151795
ゲート絶縁膜としてSiO2を用いたGaN及びSiCトランジスタの閾値電圧安定性に及ぼす界面状態と界面近傍トラップの影響
Effects of interface states and near interface traps on the threshold voltage stability of GaN and SiC transistors employing SiO2 as gate dielectric
著者 (5件):
Fiorenza Patrick
(Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII, n 5, 95121 Catania, Italy)
,
Greco Giuseppe
(Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII, n 5, 95121 Catania, Italy)
,
Giannazzo Filippo
(Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII, n 5, 95121 Catania, Italy)
,
Iucolano Ferdinando
(STMicroelectronics, Stradale Primosole, n 50, 95121 Catania, Italy)
,
Roccaforte Fabrizio
(Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII, n 5, 95121 Catania, Italy)
資料名:
Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena
(Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena)
巻:
35
号:
1
ページ:
01A101-01A101-6
発行年:
2017年01月
JST資料番号:
E0974A
ISSN:
2166-2746
CODEN:
JVTBD9
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)