文献
J-GLOBAL ID:201702262491627445
整理番号:17A1647256
低電力,高速二重尾部コンパレータの設計【Powered by NICT】
Design of a low power, high speed double tail comparator
著者 (5件):
Aakash S.
(Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore Amrita VishwaVidyapeetham Amrita University, India)
,
Anisha A.
(Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore Amrita VishwaVidyapeetham Amrita University, India)
,
Das G. Jaswanth
(Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore Amrita VishwaVidyapeetham Amrita University, India)
,
Abhiram T.
(Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore Amrita VishwaVidyapeetham Amrita University, India)
,
Anita J. P.
(Department of Electronics and Communication Engineering, Amrita School of Engineering, Coimbatore Amrita VishwaVidyapeetham Amrita University, India)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
ICCPCT
ページ:
1-5
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)