文献
J-GLOBAL ID:201702264005131825
整理番号:17A1399832
ハイブリッドARM FPGAクラスタに基づくRSA過程の加速【Powered by NICT】
Acceleration of RSA processes based on hybrid ARM-FPGA cluster
著者 (5件):
Xu Bai
(Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences, UCAS, Beijing, China)
,
Lei Jiang
(Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences, UCAS, Beijing, China)
,
Qiong Dai
(Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences, UCAS, Beijing, China)
,
Jiajia Yang
(Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences, UCAS, Beijing, China)
,
Jianlong Tan
(Institute of Information Engineering, School of Cyber Security, University of Chinese Academy of Sciences, UCAS, Beijing, China)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
ISCC
ページ:
682-688
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)