文献
J-GLOBAL ID:201702270800342648
整理番号:17A0359593
90nm CMOSにおけるオンチップ可同調負荷整合回路網および電力検出を用いた60GHz電力増幅器設計
A 60-GHz power amplifier design with on-chip tunable load-matching network and power detect in 90-nm CMOS
著者 (4件):
Zheng Zonghua
(Institute of VLSI Design, Zhejiang University, 38 Zheda Road, Hangzhou, 310027, China)
,
Zheng Zonghua
(The Key Laboratory of RF Circuits and Systems of Ministry of Education, Hangzhou Dianzi University, Xiasha Higher Education Zone, Hangzhou 310018, China)
,
Sun Lingling
(The Key Laboratory of RF Circuits and Systems of Ministry of Education, Hangzhou Dianzi University, Xiasha Higher Education Zone, Hangzhou 310018, China)
,
Liu Jun
(The Key Laboratory of RF Circuits and Systems of Ministry of Education, Hangzhou Dianzi University, Xiasha Higher Education Zone, Hangzhou 310018, China)
資料名:
IEEJ Transactions on Electrical and Electronic Engineering
(IEEJ Transactions on Electrical and Electronic Engineering)
巻:
12
号:
1
ページ:
140-146
発行年:
2017年01月
JST資料番号:
W1854A
ISSN:
1931-4973
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)