文献
J-GLOBAL ID:201702272336001063
整理番号:17A0884221
WSe_2に基づく高速電荷トラップメモリの設計エネルギーバンドによる除去Overerase挙動【Powered by NICT】
Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2
著者 (6件):
Liu Chunsen
(State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, 200433, China)
,
Yan Xiao
(State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, 200433, China)
,
Wang Jianlu
(National Laboratory for Infrared Physics, Shanghai Institute of Technical Physics, Chinese Academy of Sciences, 500 Yu Tian Road, Shanghai, 200083, China)
,
Ding Shijin
(State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, 200433, China)
,
Zhou Peng
(State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, 200433, China)
,
Zhang David Wei
(State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, 200433, China)
資料名:
Small
(Small)
巻:
13
号:
17
ページ:
ROMBUNNO.201604128
発行年:
2017年
JST資料番号:
W2348A
ISSN:
1613-6810
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
ドイツ (DEU)
言語:
英語 (EN)